Fixing Instruction Register Timing
It turns out that clocking the instruction register with BITCLK wasn't
such a good idea, because its transitions occur slightly ahead of
RUNCLK, and this was leading to glitchy behaviour.
So I came up with another solution to the problem that the change to
the IR clocking was designed to solve. The IR is clocked with BITCLK as
before, and the Run Control subcircuit lets through a RUNCLK pulse
during a Continue pulse.
Changes to main circuit:
Changes to Run Control:
